Reduced Stresses Inside Semiconductor Chips Lead to Higher Reliability

Luca Cecchetto, Lucia Zullino And Lorenzo Cerati, STMicroelectronics, Milan, Italy

Semiconductor manufacturers, thanks to technological advances that are leading to a continuous scaling of lithographic dimensions, are creating integrated circuits (ICs) that are increasingly smaller. Reducing silicon consumption without decreasing device reliability can mean multiple millions of dollars in cost savings. Thus, Pad Over Active (POA) structures have been implemented in most advanced semiconductor technologies in order to optimize area consumption.